IJAEMS
Modern aerospace electronics demand the implementation of SRAM design structures that have minimal power dissipation, high reliability, and excellent soft error resilience when subjected to radiation. Traditional SRAMs are associated with the problem of leakage current, small static noise margin (SNM) and low reliability in nanometer-scale CMOS technologies. In this research paper, a comparison study between traditional 6T SRAM, Dice SRAM, WeQuatro SRAM, and the proposed Deep Radiation Flexible (DRF) 10T SRAM is done. The DRF 10T SRAM structure proposed in this study is designed to minimize leakage power dissipation, enhancing radiation tolerance, and improving reliability during read and write operations. All SRAM designs are designed and simulated using Cadence Virtuoso in UMC 55nm CMOS technology. The performance comparison was done based on leakage power, delay, SNM, and soft error recovery rate. Comparison reveals that the proposed architecture is more resilient to soft errors and has better signal integrity than other existing architectures. Moreover, the DRF 10T SRAM has been successfully tested under high-frequency operations and process variability. The results thus obtained suggest that the proposed SRAM architecture offers a good compromise between power consumption and radiation hardness.